W942508CH Datasheet, PDF (1/47 Pages) Winbond – 8M x 4 BANKS x 8 BIT DDR SDRAM

W942508CH
8M × 4 BANKS × 8 BIT DDR SDRAM
Table of Contents-
1.
GENERAL DESCRIPTION .................................................................................................. 3
2.
FEATURES .......................................................................................................................... 3
3.
KEY PARAMETERS ............................................................................................................ 4
4.
PIN CONFIGURATION ........................................................................................................ 5
5.
PIN DESCRIPTION.............................................................................................................. 6
6.
BLOCK DIAGRAM ............................................................................................................... 7
7.
ELECTRICAL CHARACTERISTICS .................................................................................... 8
7.1
Absolute Maximum Ratings ................................................................................................. 8
7.2
Recommended DC Operating Conditions............................................................................ 8
7.3
Capacitance ......................................................................................................................... 9
7.4
Leakage and Output Buffer Characteristics ......................................................................... 9
7.5
DC Characteristics ............................................................................................................. 10
7.6
AC Characteristics and Operating Condition ..................................................................... 11
7.7
AC Test Conditions ............................................................................................................ 13
8.
Operation Mode ................................................................................................................. 15
8.1
Simplified Truth Table ........................................................................................................ 15
8.2
Function Truth Table .......................................................................................................... 16
8.3
Function Truth Table for CKE ............................................................................................ 19
8.4
Simplified State Diagram.................................................................................................... 20
9.
FUNCTIONAL DESCRIPTION........................................................................................... 21
9.1
Power Up Sequence .......................................................................................................... 21
9.2
Command Function............................................................................................................ 21
9.3
Read Operation.................................................................................................................. 24
9.4
Write Operation .................................................................................................................. 24
9.5
Precharge........................................................................................................................... 24
9.6
Burst Termination............................................................................................................... 25
9.7
Refresh Operation.............................................................................................................. 25
9.8
Power Down Mode............................................................................................................. 25
9.9
Mode Register Operation ................................................................................................... 25
10. TIMING WAVEFORMS ............................................................................................................. 29
10.1 Command Input Timing...................................................................................................... 29
10.2 Timing of the CLK Signals.................................................................................................. 29
10.3 Read Timing (Burst Length = 4) ......................................................................................... 30
10.4 Write Timing (Burst Length = 4) ......................................................................................... 31
10.5 DM, DATA MASK (W942508CH/W942504CH) ................................................................. 32
Publication Release Date: May 21, 2003
-1-
Revision A3