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THS8200IPFP Datasheet, PDF (9/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System
THS8200-EP
www.ti.com
SLES253 – DECEMBER 2009
All-Format Oversampled Component Video/PC Graphics D/A System With Three 11-Bit
DACs, CGMS Data Insertion
Check for Samples: THS8200-EP
1 Introduction
1.1 Features
12
• Three 11-Bit 205-MSPS D/A Converters With
Integrated Bi-Level/Tri-Level Sync Insertion
• Support for All ATSC Video Formats (Including
1080P) and PC Graphics Formats (Up to UXGA
at 75 Hz)
INPUT
• Flexible 10/15/16/20/24/30-Bit Digital Video
Input Interface With Support for YCbCr or RGB
Data, Either 4:4:4 or 4:2:2 Sampled
• Video Synchronization Via Hsync, Vsync
Dedicated Inputs or Via Extraction of
Embedded SAV/EAV Codes According to
ITU-R.BT601 (SDTV) or
SMPTE274M/SMPTE296M (HDTV)
• Glueless Interface to TI DVI 1.0 (With HDCP)
Receivers. Can Receive Video-Over-DVI
Formats According to the EIA-861 Specification
and Convert to YPbPr/RGB Component
Formats With Separate Syncs or Embedded
Composite Sync
VIDEO PROCESSING
• Programmable Clip/Shift/Multiply Function for
Operation With Full-Range or ITU-R.BT601
Video Range Input Data
• Programmable Digital Fine-Gain Controller on
Each Analog Output Channel, for Accurate
Channel Matching and Programmable
White-Balance Control
• Built-In 4:2:2 to 4:4:4 Video Interpolation Filter
• Built-In 2× Oversampling SDTV/HDTV
Interpolation Filter for Improved Video
Frequency Characteristic
• Fully Programmable Digital Color Space
Conversion Circuit
• Fully Programmable Display Timing Generator
to Supply All SDTV and HDTV Composite Sync
Ttiming Formats, Progressive and Interlaced
• Fully Programmable Hsync/Vsync Outputs
• Vertical Blanking Interval (VBI) Override or
Data Pass-Thru for VBI Data Transparency
• Programmable CGMS Data Generation and
Insertion
OUTPUT
• Digital
– ITU-R BT.656 Digital Video Output Port
• Analog
– Analog Component Output from
Software-Switchable 700-mV/1.3-V Compliant
Output DACs at 37.5-Ω load
– Programmable Video/Sync Ratio (7:3 or 10:4)
– Programmable Video Pedestal
GENERAL
• Built-In Video Color Bar Test Pattern Generator
• Fast Mode I2C Control Interface
• Configurable Master or Slave Timing Mode
– Configuration Modes Allow the Device to Act
as a Master Timing Source for Requesting
Data from, e.g., the Video Frame Buffer.
Alternatively, the Device Can Slave to an
External Timing Master (Master Mode Only
Available for PC Graphics Output Modes).
• DAC and Chip Powerdown Modes
• Low-Power 1.8-/3.3-V Operation
• 80-pin PowerPAD™ Plastic Quad Flatpack
Package with Efficient Heat Dissipation and
Small Physical Size
APPLICATIONS
• DVD Players
• Digital-TV/Interactive-TV/Internet Set-Top
Boxes
• Personal Video Recorders
• HDTV Display or Projection Systems
• Digital Video Systems
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated