THS8200IPFP Datasheet, PDF (79/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System

THS8200-EP
www.ti.com
SLES253 – DECEMBER 2009
5.1.8 Display Timing Generator Control, Part 2 (Sub-Addresses 0x50−0x82)
dtg2_bp<n>(10:0):
{see register map table}
breakpoint<n> line number
[000 0000 0000]
DTG outputs line type dtg2_linetype<n> until line number of dtg2_bp<n+1> is reached. (n = 1..16)
dtg2_linetype<n>(3:0):
Line type for dtg2_bp<n>
{see register map table}
[0000]
The DTG outputs a line format corresponding to the table below until the next breakpoint line
number is reached. (n = 1..16)
LINE TYPE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
MODE
ACTIVE_VIDEO
FULL_NTSP
FULL_BTSP
NTSP_NTSP
BTSP_BTSP
NTSP_BTSP
BTSP_NTSP
ACTIVE_NEQ
NSP_ACTIVE
FULL_NSP
FULL_BSP
FULL_NEQ
NEQ_NEQ
BSP_BSP
BSP_NEQ
NEQ_BSP
dtg2_hlength(9:0):
HS_OUT duration
{dtg2_hlength_lsb_hdly_msb
0x71(7:6) and
dtg2_hlength_lsb 0x70(7:0)}
[00 0110 0000]
Sets the duration of the HS_OUT output signal
dtg2_hdly(12:0):
HS_OUT delay
{dtg2_hlength_lsb_hdly_msb
0x71(4:0) and
dtg2_hdly_lsb 0x72(7:0)}
[0 0000 0000 0010]
Sets the pixel value that the HS_OUT signal is asserted on.
Note: when programmed to a value higher than the total number of pixels per line, there will be no
HS_OUT output.
dtg2_vlength1(9:0):
VS_OUT duration, field 1
{dtg2_vlength1_msb_vdly1_msb
0x74(7:6)
and dtg2_vlength1_lsb 0x73(7:0)}
[00 0000 0011]
Sets the duration of the VS_OUT output signal during progressive scan video modes or during the
vertical blank interval of field 1 in interlaced video modes.
dtg2_vdly1(10:0):
VS_OUT delay, field 1
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I²C Register Map
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