|
THS8200IPFP Datasheet, PDF (21/104 Pages) Texas Instruments – All-Format Oversampled Component Video/PC Graphics D/A System | |||
|
◁ |
THS8200-EP
www.ti.com
SLES253 â DECEMBER 2009
of HS_IN (i.e. the first CLKIN rising edge seeing HS active) and a Cb color component assumed
present during that clock period on the input bus. When embedded timing is used in this mode, the
SAV/EAV structure also unambiguously defines the CbCr sequence, according to ITU-R.BT656 (for
625I and 525I) and SMPTE293M (for 525P).
⢠16-bit RGB 4:4:4
CLKIN
GY[9]
GY[8]
GY[7]
GY[6]
GY[5]
GY[4]
GY[3]
GY[2]
R7(0)
R6(0)
R5(0)
R4(0)
R3(0)
G7(0)
G6(0)
G5(0)
R7(1)
R6(1)
R5(1)
R4(1)
R3(1)
G7(1)
G6(1)
G5(1)
R7(2)
R6(2)
R5(2)
R4(2)
R3(2)
G7(2)
G6(2)
G5(2)
R7(3)
R6(3)
R5(3)
R4(3)
R3(3)
G7(3)
G6(3)
G5(3)
G7(0)
G6(0)
G5(0)
G4(0)
G3(0)
G2(0)
0
0
G7(1)
G6(1)
G5(1)
G4(1)
G3(1)
G2(1)
0
0
G7(2)
G6(2)
G5(2)
G4(2)
G3(2)
G2(2)
0
0
G7(3)
G6(3)
G5(3)
G4(3)
G3(3)
G2(3)
0
0
TO CH1
BCb[9]
BCb[8]
BCb[7]
BCb[6]
BCb[5]
BCb[4]
BCb[3]
BCb[2]
G4(0)
G3(0)
G2(0)
B7(0)
B6(0)
B5(0)
B4(0)
B3(0)
G4(1)
G3(1)
G2(1)
B7(1)
B6(1)
B5(1)
B4(1)
B3(1)
G4(2)
G3(2)
G2(2)
B7(2)
B6(2)
B5(2)
B4(2)
B3(2)
G4(3)
G3(3)
G2(3)
B7(3)
B6(3)
B5(3)
B4(3)
B3(3)
B7(0)
B6(0)
B5(0)
B4(0)
B3(0)
0
0
0
B7(1)
B6(1)
B5(1)
B4(1)
B3(1)
0
0
0
B7(2)
B6(2)
B5(2)
B4(2)
B3(2)
0
0
0
B7(3)
B6(3)
B5(3)
B4(3)
B3(3)
0
0
0
TO CH2
RCr[9]
X
X
X
X
RCr[8]
X
X
X
X
RCr[7]
X
X
X
X
RCr[6]
X
X
X
X
RCr[5]
X
X
X
X
RCr[4]
X
X
X
X
RCr[3]
X
X
X
X
RCr[2]
X
X
X
X
R7(0)
R6(0)
R5(0)
R4(0)
R3(0)
0
0
0
R7(1)
R6(1)
R5(1)
R4(1)
R3(1)
0
0
0
R7(2)
R6(2)
R5(2)
R4(2)
R3(2)
0
0
0
R7(3)
R6(3)
R5(3)
R4(3)
R3(3)
0
0
0
TO CH3
Figure 4-3. 16-Bit RGB 4:4:4 Data Format
CLKIN is equal to 1Ã the pixel clock. This format is only supported in VESA mode and can be used for
PC graphics applications that do not require full 8-bit resolution on each color component.
⢠15-bit RGB 4:4:4
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): THS8200-EP
Detailed Functional Description
21
|
▷ |