DS90UR903Q-Q1 Datasheet, PDF (9/44 Pages) Texas Instruments – 10 - 43MHz 18 Bit Color FPD-Link II Serializer and Deserializer

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DS90UR903Q-Q1, DS90UR904Q-Q1
SNLS346C – AUGUST 2011 – REVISED JUNE 2014
Electrical Characteristics^{(1) (2) (3)}
(continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
I_DDR
Deserializer (Rx) VDDn Supply Current
V_DDn = 1.89V PCLK = 43 MHz
(includes load current)
C_L = 8 pF
SSCG[3:0] =
WORST
ON
60
CASE Pattern Default
Figure 2
Registers
V_DDn = 1.89V PCLK = 43 MHz
C_L = 8 pF
Default
RANDOM
Registers
53
PRBS-7
Pattern
I_DDIOR Deserializer (Rx) VDDIO Supply Current
V_DDIO = 1.89V PCLK = 43 MHz
(includes load current)
C_L = 8 pF
Default
WORST
Registers
21
CASE Pattern
Figure 2
V_DDIO = 3.6V PCLK = 43 MHz
C_L = 8 pF
WORST
Default
Registers
49
CASE Pattern
I_DDRZ Deserializer (Rx) Supply Current Power-
PDB = 0V; All V_DDn = 1.89V
42
I_DDIORZ ^down
other
LVCMOS
V_DDIO = 1.89V
8
Inputs = 0V VDDIO = 3.6V
350
MAX
96
32
83
400
40
800
UNIT
mA
µA
6.6 Recommended Serializer Timing for PCLK⁽¹⁾
Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
t_TCP
t_TCIH
t_TCIL
t_CLKT
Transmit Clock Period
Transmit Clock Input High Time
Transmit Clock Input Low Time
PCLK Input Transition Time
Figure 8
10 MHz – 43 MHz
23.3
T
0.4T
0.5T
0.4T
0.5T
0.5
f_OSC
Internal oscillator clock source
25
(1) Recommended Input Timing Requirements are input specifications and not tested in production.
MAX
100
0.6T
0.6T
3
UNIT
ns
ns
ns
ns
MHz
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