DS90UR903Q-Q1 Datasheet, PDF (4/44 Pages) Texas Instruments – 10 - 43MHz 18 Bit Color FPD-Link II Serializer and Deserializer

DS90UR903Q-Q1, DS90UR904Q-Q1
SNLS346C – AUGUST 2011 – REVISED JUNE 2014
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DS90UR903Q Serializer Pin Functions (continued)
PIN
NAME
NUMBER
FPD-LINK II INTERFACE
DOUT+
17
DOUT-
16
POWER AND GROUND⁽¹⁾
VDDPLL
14
VDDT
15
VDDCML
18
VDDD
34
VDDIO
31
VSS
DAP
I/O, TYPE
DESCRIPTION
Output, CML
Output, CML
Non-inverting differential output. The interconnect must be AC Coupled with a
100 nF capacitor.
Inverting differential output. The interconnect must be AC Coupled with a 100
nF capacitor.
Power, Analog
Power, Analog
Power, Analog
Power, Digital
Power, Digital
Ground, DAP
PLL Power, 1.8V ±5%
Tx Analog Power, 1.8V ±5%
CML Power, 1.8V ±5%
Digital Power, 1.8V ±5%
Power for I/O stage. The single-ended inputs and SDA, SCL are powered from
V_DDIO. V_DDIO can be connected to a 1.8V ±5% or 3.3V ±10%
DAP must be grounded. DAP is the large metal contact at the bottom side,
located at the center of the WQFN package. Connected to the ground plane
(GND) with at least 16 vias.
(1) See Power Up Requirements and PDB PIN.
48 Pin Deserializer - DS90UR904Q
Package RHS
Top View
RES 37
RES 38
RES 39
V_DDCML 40
RIN+ 41
RIN- 42
RES 43
RES 44
V_DDPLL 45
RES 46
MODE 47
ID[x] 48
DAP = GND
DS90UR904Q
Deserializer
48-Pin WQFN
(Top View)
24 ROUT[4]
23 ROUT[5]
22 ROUT[6]
21 ROUT[7]
20 V_DDIO2
19 ROUT[8]
18 ROUT[9]
17 V_DDD
16 ROUT[10]
15 ROUT[11]
14 ROUT[12]
13 ROUT[13]
4
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