DS90UR903Q-Q1 Datasheet, PDF (18/44 Pages) Texas Instruments – 10 - 43MHz 18 Bit Color FPD-Link II Serializer and Deserializer

DS90UR903Q-Q1, DS90UR904Q-Q1
SNLS346C – AUGUST 2011 – REVISED JUNE 2014
7 Detailed Description
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7.1 Overview
The DS90UR903Q/904Q FPD-Link II chipset is intended for video display applications. The Serializer/
Deserializer chipset operates from a 10 MHz to 43 MHz pixel clock frequency. The DS90UR903Q transforms a
21-bit wide parallel LVCMOS data bus into a single high-speed differential pair. The high-speed serial bit stream
contains an embedded clock and DC-balance information which enhances signal quality to support AC coupling.
The DS90UR904Q receives the single serial data stream and converts it back into a 21-bit wide parallel data
bus.
7.2 Functional Block Diagram
7.2.1 Typical Application Diagram
Graphics
Controller
--
Video
Processor
Parallel
Data In
18+3
DS90UR903Q
FPD-Link II
Parallel
Data Out
18+3
DS90UR904Q
Display
Module
SCL
SDA
Serializer
SCL
SDA
Deserializer
Figure 20. Typical Application Circuit
7.2.2 Block Diagrams
R/G/B[5:0], ²¹
HS,VS,DE
R_T
R_T DOUT+
RIN+ ^RT
R_T
21 _R/G/B[5:0],
HS,VS,DE
PCLK
PDB
MODE
SDA
SCL
ID[x]
PLL
Clock
Gen
Timing
and
Control
DOUT-
RIN-
PDB
MODE
CDR
Clock
Gen
Timing
and
Control
PCLK
LOCK
SDA
SCL
ID[x]
DS90UR903Q - SERIALIZER
DS90UR904Q - DESERIALIZER
Figure 21. Block Diagram
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