DS90UR903Q-Q1 Datasheet, PDF (33/44 Pages) Texas Instruments – 10 - 43MHz 18 Bit Color FPD-Link II Serializer and Deserializer

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Layout Example (continued)
DS90UR903Q-Q1, DS90UR904Q-Q1
SNLS346C – AUGUST 2011 – REVISED JUNE 2014
Figure 35. No Pullback LLP, Single Row Reference Diagram
Table 6. No Pullback LLP Stencil Aperture Summary for DS90UR903Q-Q1 and DS90UR904Q-Q1
Device
Pin
Count
MKT Dwg
PCB I/O
Pad Size
(mm)
DS90UR903Q-Q1
40
DS90UR904Q-Q1
48
SNA40A
SNA48A
0.25 x 0.6
0.25 x 0.6
PCB
Pitch
(mm)
0.5
0.5
PCB DAP
size(mm)
Stencil I/O
Aperture
(mm)
4.6 x 4.6
5.1 x 5.1
0.25 x 0.7
0.25 x 0.7
Stencil
DAP
Aperture
(mm)
1.0 x 1.0
1.1 x 1.1
Number of
DAP
Aperture
Openings
16
16
Gap
Between
DAP
Aperture
(Dim A
mm)
0.2
0.2
Figure 36. 48-Pin WQFN Stencil Example of Via and Opening Placement
The following PCB layout examples are derived from the layout design of the DS90UB903Q-Q1 and
DS90UB904Q-Q1 in the SERDESUB-21USB Evaluation Module User's Guide ( SNLU101). These graphics and
additional layout description are used to demonstrate both proper routing and proper solder techniques when
designing in the Ser/Des pair.
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