DS80PCI402_15 Datasheet, PDF (44/54 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 4-Lane PCI-Express Repeater With Equalization and De-Emphasis

DS80PCI402
SNLS324E – APRIL 2011 – REVISED JANUARY 2015
3.3-V or 2.5-V Supply Mode Operation (continued)
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3.3V mode
2.5V mode
Enable
VDD_SEL
Internal
voltage
regulator
2.5V
VIN
VDD
VDD
VDD
3.3V
Capacitors can be
either tantalum or an
ultra-low ESR seramic.
0.1 uF
0.1 uF
0.1 uF
Disable
VDD_SEL
open
Internal
voltage
regulator
VIN
open
VDD
0.1 uF
2.5V
VDD
VDD
0.1 uF
Capacitors can be
either tantalum or an
ultra-low ESR seramic.
0.1 uF
VDD
0.1 uF
VDD
0.1 uF
VDD
0.1 uF
VDD
0.1 uF
Place 0.1 uF close to VDD Pin
Total capacitance should be % 0.5 uF
Place capcitors close to VDD Pin
Figure 14. 3.3 V or 2.5 V Supply Connection Diagram
10.2 Power Supply Bypassing
Two approaches are recommended to ensure that the DS80PCI402 is provided with an adequate power supply
bypass. First, the supply (VDD) and ground (GND) pins should be connected to power planes routed on adjacent
layers of the printed circuit board. Second, careful attention to supply bypassing through the proper use of
bypass capacitors is required. A 0.1-μF bypass capacitor should be connected to each VDD pin such that the
capacitor is placed as close as possible to the device. Small body size capacitors (such as 0402) reduce the
parasitic inductance of the capacitor and also help in placement close to the VDD pin. If possible, the layer
thickness of the dielectric should be minimized so that the VDD and GND planes create a low inductance supply
with distributed capacitance.
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