DS80PCI402_15 Datasheet, PDF (33/54 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 4-Lane PCI-Express Repeater With Equalization and De-Emphasis

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DS80PCI402
SNLS324E – APRIL 2011 – REVISED JANUARY 2015
Address Register Name
0x25
CH3 - CHB_3
VOD
0x26
CH3 - CHB_3
DEM
0x27
CH3 - CHB_3
IDLE Threshold
0x28
Signal Detect
Status Control
Table 9. SMBus Slave Mode Register Map (continued)
Bit Field
Type Default
EEPROM Description
Bit
7
Short Circuit
R/W 0xAD
Yes
Protection
1: Enable the short circuit protection
0: Disable the short circuit protection
6
RATE_SEL
Yes
1: Gen 1/2
0: Gen 3
Note: Override the RATE pin
5:3 Reserved
Yes
Set bits to default value - 101
2:0 VOD Control
Yes
OUTB_3 VOD Control
000: 0.7 V
001: 0.8 V
010: 0.9 V
011: 1.0 V
100: 1.1 V
101: 1.2 V (default)
110: 1.3 V
111: 1.4 V
7
RXDET
STATUS
R 0x02
Observation bit for RXDET CH3 - CHB_3
1: RX = detected
0: RX = not detected
6:5 RATE_DET
R
STATUS
Observation bit for RATE_DET CH3 - CHB_3
00: GEN1 (2.5G)
01: GEN2 (5G)
11: GEN3 (8G)
4:3 Reserved
R/W
Set bits to 0
2:0 DEM Control R/W
Yes
OUTB_3 DEM Control
000: 0 dB
001: –1.5 dB
010: –3.5 dB (default)
011: –5 dB
100: –6 dB
101: –8 dB
110: –9 dB
111: –12 dB
7
Reserved
R/W 0x00
Yes
Set bit to 0
6:4 Reserved
Set bits to 0
3:2 IDLE tha
Yes
Assert threshold
00 = 180 mVp-p (default)
01 = 160 mVp-p
10 = 210 mVp-p
11 = 190 mVp-p
Note: Override the SD_TH pin
1:0 IDLE thd
Yes
Deassert threshold
00 = 110 mVp-p (default)
01 = 100 mVp-p
10 = 150 mVp-p
11 = 130 mVp-p
Note: Override the SD_TH pin
7
Reserved
R/W 0x0C
Set bit to 0
6
Reserved
Yes
Set bit to 0
5:4 High SD_TH
Status
Yes
Enable Higher Range of Signal Detect Status
Thresholds
[5]: CH0 - CH3
[4]: CH4 - CH7
3:2 Fast Signal
Detect Status
Yes
Enable Fast Signal Detect Status
[3]: CH0 - CH3
[2]: CH4 - CH7
Note: In Fast Signal Detect, assert/deassert
response occurs after approximately 3-4 ns
1:0 Reduced SD
Status Gain
Yes
Enable Reduced Signal Detect Status Gain
[1]: CH0 - CH3
[0]: CH4 - CH7
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