DS80PCI402_15 Datasheet, PDF (18/54 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 4-Lane PCI-Express Repeater With Equalization and De-Emphasis

DS80PCI402
SNLS324E – APRIL 2011 – REVISED JANUARY 2015
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8.5.4 Reading a Register
To read a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a “0” indicating a WRITE.
2. The Device (Slave) drives the ACK bit (“0”).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (“0”).
5. The Host drives a START condition.
6. The Host drives the 7-bit SMBus Address, and a “1” indicating a READ.
7. The Device drives an ACK bit “0”.
8. The Device drives the 8-bit data value (register contents).
9. The Host drives a NACK bit “1”indicating end of the READ transfer.
10. The Host drives a STOP condition.
The READ transaction is completed, the bus goes IDLE and communication with other SMBus devices may now
occur.
8.5.5 SMBus Master Mode
The DS80PCI402 device supports reading directly from an external EEPROM device by implementing SMBus
Master mode. When using the SMBus master mode, the DS80PCI402 will read directly from specific location in
the external EEPROM. When designing a system for using the external EEPROM, the user needs to follow these
specific guidelines.
• Set ENSMB = Float — enable the SMBUS master mode.
• The external EEPROM device address byte must be 0xA0 and capable of 1-MHz operation at 2.5-V and 3.3-
V supply. The maximum allowed size is 8 kbits (1024 bytes)
• Set the AD[3:0] inputs for SMBus address byte. When the AD[3:0] = 0000'b, the device address byte is 0xB0.
When tying multiple DS80PCI402 devices to the SDA and SCL bus, use these guidelines to configure the
devices.
• Use SMBus AD[3:0] address bits so that each device can loaded its configuration from the EEPROM.
Example below is for 4 devices.
– U1: AD[3:0] = 0000 = 0xB0
– U2: AD[3:0] = 0001 = 0xB2
– U3: AD[3:0] = 0010 = 0xB4
– U4: AD[3:0] = 0011 = 0xB6
• Use a pullup resistor on SDA and SCL; value = 2 kΩ
• Daisy-chain READ_EN (pin 26) and ALL_DONE (pin 27) from one device to the next device in the sequence
so that they do not compete for the EEPROM at the same time.
1. Tie READ_EN of the first device in the chain (U1) to GND
2. Tie ALL_DONE of U1 to READ_EN of U2
3. Tie ALL_DONE of U2 to READ_EN of U3
4. Tie ALL_DONE of U3 to READ_EN of U4
5. Optional: Tie ALL_DONE output of U4 to a LED to show the devices have been loaded successfully
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