DS80PCI402_15 Datasheet, PDF(40/54 Page) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 4-Lane PCI-Express Repeater With Equalization and De-Emphasis

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

DS80PCI402_15 Datasheet, PDF (40/54 Pages) Texas Instruments – 2.5-Gbps / 5.0-Gbps / 8.0-Gbps 4-Lane PCI-Express Repeater With Equalization and De-Emphasis

◁

DS80PCI402

SNLS324E â APRIL 2011 â REVISED JANUARY 2015

9 Application and Implementation

www.ti.com

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TIâs customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

In PCIe Gen-3 applications, the specification requires Rx-Tx link training to establish and optimize signal

conditioning settings at 8 Gbps. In link training, the Rx partner requests a series of FIR - preshoot and de-

emphasis coefficients (10 Presets) from the Tx partner. The Rx partner includes 7-levels (6 dB to 12 dB) of CTLE

followed by a single tap DFE. The link training would pre-condition the signal with an equalized link between the

root-complex and endpoint. Note that there is no link training in PCIe Gen-1 (2.5 Gbps) or PCIe Gen-2 (5.0

Gbps) applications. The DS80PCI402 is placed in between the Tx and Rx. It would help extend the PCB trace

reach distance by boosting the attenuated signals with its equalization, so that the signal can be more easily

recovered by the downstream Rx. In Gen 3 mode, DS80PCI402 transmit outputs are designed to pass the Tx

Preset signaling onto the Rx for the PCIe Gen 3 link to train and optimize the equalization settings. The

suggested setting for the DS80PCI402 are EQ=00, VOD = 1.2 Vp-p and DEM = 0 dB. Additional adjustments to

increase the EQ or DEM setting should be performed to optimize the eye opening in the Rx partner. See the

tables below for Pin Mode and SMBus Mode configurations.

CHANNEL

EQx[1:0]

DEMx[1:0]

Table 10. Suggested Device Settings in Pin Mode

PIN MODE SETTINGS

0, 0 (Level 1)

Float, R (Level 10)

0x06

0x0F

0x10

0x11

0x16

0x17

0x18

0x1D

0x1E

0x1F

0x24

0x25

0x26

0x2C

0x2D

0x2E

0x33

0x34

0x35

0x3A

0x3B

0x3C

Table 11. Suggested Device Settings in SMBus Slave Mode

WRITE VALUE

0x18

0x00

0xAD

0x00

0xAD

0x00

0xAD

0x00

0xAD

0x00

0xAD

0x00

0xAD

0x00

0xAD

0x00

COMMENTS

Enables SMBus Slave Mode Register Control

Set CHB_0 EQ to 0x00.

Set CHB_0 VOD to 101'b (1.2 Vp-p).

Set CHB_0 DEM to 000'b (0 dB).

Set CHB_1 EQ to 0x00.

Set CHB_1 VOD to 101'b (1.2 Vp-p).

Set CHB_1 DEM to 000'b (0 dB).

Set CHB_2 EQ to 0x00.

Set CHB_2 VOD to 101'b (1.2 Vp-p).

Set CHB_2 DEM to 000'b (0 dB).

Set CHB_3 EQ to 0x00.

Set CHB_3 VOD to 101'b (1.2 Vp-p).

Set CHB_3 DEM to 000'b (0 dB).

Set CHA_0 EQ to 0x00.

Set CHA_0 VOD to 101'b (1.2 Vp-p).

Set CHA_0 DEM to 000'b (0 dB).

Set CHA_1 EQ to 0x00.

Set CHA_1 VOD to 101'b (1.2 Vp-p).

Set CHA_1 DEM to 000'b (0 dB).

Set CHA_2 EQ to 0x00.

Set CHA_2 VOD to 101'b (1.2 Vp-p).

Set CHA_2 DEM to 000'b (0 dB).

Submit Documentation Feedback

Product Folder Links: DS80PCI402

▷