DRV8305-Q1_16 Datasheet, PDF (4/54 Pages) Texas Instruments – Three-Phase Automotive Gate Driver

DRV8305-Q1
SLVSD12A – MAY 2015 – REVISED MARCH 2016
www.ti.com
PIN
NAME
NO.
SN3
19
SP3
20
SN2
21
SP2
22
SN1
23
SP1
24
GLC
25
SLC
26
SHC
27
GHC
28
GHB
29
SHB
30
SLB
31
GLB
32
GLA
33
SLA
34
SHA
35
GHA
36
VCP_LSD
37
VCPH
38
CP2H
39
CP2L
40
PVDD
41
CP1L
42
CP1H
43
VDRAIN
44
DVDD
46
WAKE
47
VREG
GND
48
PPAD
Pin Functions (continued)
I/O
I Current amplifier negative input
I Current amplifier positive input
I Current amplifier negative input
I Current amplifier positive input
I Current amplifier negative input
I Current amplifier positive input
O Low-side gate driver
I Low-side source connection
I High-side source connection
O High-side gate driver
O High-side gate driver
I High-side source connection
I Low-side source connection
O Low-side gate driver
O Low-side gate driver
I Low-side source connection
I High-side source connection
O High-side gate driver
P Low-side gate driver regulator
P High-side gate driver regulator
P
Charge pump flying capacitor
P
P Power supply
P
Charge pump flying capacitor
P
P High-side drain
P Digital regulator
I Wake up from sleep control pin
P VREG/VREF
P Device ground
DESCRIPTION
Negative input of current sense amplifier 3
Positive input of current sense amplifier 3
Negative input of current sense amplifier 2
Positive input of current sense amplifier 2
Negative input of current sense amplifier 1
Positive input of current sense amplifier 1
Low-side gate driver output for half-bridge C
Low-side source connection for half-bridge C
High-side source connection for half-bridge C
High-side gate driver output for half-bridge C
High-side gate driver output for half-bridge B
High-side source connection for half-bridge B
Low-side source connection for half-bridge B
Low side gate driver output for half-bridge B
Low-side gate driver output for half-bridge A
Low-side source connection for half-bridge A
High-side source connection for half-bridge A
High-side gate driver output for half-bridge A
Internal voltage regulator for low-side gate driver; connect 1-
µF capacitor to GND
Internal charge pump for high-side gate driver; connect 2.2-
µF capacitor to PVDD
Flying capacitor for charge pump; connect 0.047-µF
capacitor between CP2H and CP2L
Device power supply; minimum 4.7-µF ceramic capacitor to
GND
Flying capacitor for charge pump; connect 0.047-µF
capacitor between CP1H and CP1L
High-side MOSFET drain connection; common for all three
half bridges
3.3-V internal digital-supply regulator; bypass to GND with a
6.3-V, 1-µF ceramic capacitor
High voltage tolerant input pin to wake-up device from
SLEEP; pin cannot be used to disable LDO; driver needs to
be enabled and disabled separately
Dual purpose pin based on part number; also supplies
internal amplifier reference voltage and SDO pullup.
VREG: 3.3-V or 5-V, 50-mA LDO; connect 1-µF to GND
VREF: Reference voltage; LDO disabled
Must be connected to ground
COMPONENT
C_PVDD
C_AVDD
C_DVDD
C_VCPH
C_{VCP_LSD}
C_CP1
PIN 1
PVDD
AVDD
DVDD
VCPH
VCP_LSD
CP1H
Table 1. External Components
PIN 2
GND
GND
GND
PVDD
GND
CP1L
RECOMMENDED
4.7-µF ceramic capacitor rated for PVDD
1.0-µF ceramic capacitor rated for 6.3 V
1.0-µF ceramic capacitor rated for 6.3 V
2.2-µF ceramic capacitor rated for 16 V
1.0-µF ceramic capacitor rated for 16 V
0.047-µF ceramic capacitor rated for PVDD
4
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