DRV8305-Q1_16 Datasheet, PDF (36/54 Pages) Texas Instruments – Three-Phase Automotive Gate Driver

DRV8305-Q1
SLVSD12A – MAY 2015 – REVISED MARCH 2016
7.6 Register Maps
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Table 9. Register Map
ADDRESS
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
NAME
Warnings &
Watchdog Reset
OV/VDS
Faults
IC
Faults
VGS
Faults
HS Gate Drive
Control
LS Gate Drive
Control
Gate Drive
Control
Reserved
D10
FAULT
VDS_HA
PVDD_UVLO2
VGS_HA
RSVD
RSVD
RSVD
0x9
IC Operation
FLIP_OTSD
0xA
Shunt Amplifier
Control
DC_CAL_CH3
0xB
Voltage
Regulator Control
RSVD
0xC
VDS Sense
Control
D9
RSVD
D8
TEMP_FLAG4
D7
PVDD_UVFL
D6
PVDD_OVFL
D5
VDS_STATUS
D4
VCPH_UVFL
D3
TEMP_FLAG1
D2
TEMP_FLAG2
D1
TEMP_FLAG3
D0
OTW
VDS_LA
WD_FAULT
VGS_LA
VDS_HB
OTSD
VGS_HB
VDS_LB
RSVD
VGS_LB
VDS_HC
VREG_UV
VGS_HC
VDS_LC
AVDD_UVLO
VGS_LC
RSVD
VCP_LSD
_UVLO2
RSVD
SNS_C_OCP
SNS_B_OCP
VCPH_UVLO2
VCPH_OVLO
RSVD
SNS_A_OCP
VCPH_OVLO
_ABS
TDRIVEN
IDRIVEN_HS
IDRIVEP_HS
TDRIVEP
IDRIVEN_LS
IDRIVEP_LS
COMM_OPTION
PWM_MODE
DEAD_TIME
TBLANK
DIS_PVDD
_UVLO2
DIS_GDRV
_FAULT
EN_SNS
_CLAMP
RSVD
WD_DLY
DIS_SNS_OCP
WD_EN
SLEEP
DC_CAL_CH2 DC_CAL_CH1
CS_BLANK
GAIN_CS3
GAIN_CS2
VREF_SCALE
RSVD
SLEEP_DLY
DIS_VREG
_PWRGD
RSVD
VDS_LEVEL
TVDS
CLR_FLTS
SET_VCPH_UV
GAIN_CS1
VREG_UV_LEVEL
VDS_MODE
36
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