GC4016 Datasheet, PDF (55/83 Pages) Texas Instruments – MULTI-STANDARD QUAD DDC CHIP

GC4016 MULTI-STANDARD QUAD DDC CHIP
DATA SHEET REV 1.0
ADDRESS 21: Output Clock Control, Suggested default = (see Table 3)
BIT
0-3 (LSB)
TYPE
R/W
4-5
R/W
6-7 (MSB)
R/W
NAME
SCK_RATE
NSERIAL
OUTPUT_ORDER
DESCRIPTION
Serial clock rate is SCK = CK/(1+SCK_RATE). SCK_RATE can be 0 to 15. If
SCK_RATE=0, then the serial clock rate will be equal to CK. SCK is also the
output clock for nibble and parallel modes.
The number of serial pins used to output the data is NSERIAL+1. Values 0,1,
and 3 are valid (value 2 is mapped to be the same as value 3). A value of 0
means that all outputs will be multiplexed onto one serial stream. See Figure
15(c).
Must be 0 for nibble, and link modes.
Unused for uP, and parallel modes.
OUTPUT_ORDER is normally set to 0 which will cause the data to be output in
the same order as it is computed by the resampler. If the channels are
synchronous, then the order will be IA,QA,IB,QB,IC,QC,ID,QD.
OUTPUT_ORDER must be set to 0 for asynchronous data.
OUTPUT_ORDER equal to 1 or 2 is only valid for synchronous channel data.
These modes allow channels B, C and D to be powered up and down without
disturbing the channel order. Channel A can not be powered down.
OUTPUT_ORDER=1 will cause the output order to be
IA,IB,QA,QB,IC,ID,QC,QD. This is appropriate for complex synchronous serial
data output on two streams.
OUTPUT_ORDER=2 (or 3) will cause the output order to be
IA,IB,IC,ID,QA,QB,QC,QD. This is appropriate for synchronous serial data
output on four 4 serial streams.
See Figure 15(c).
ADDRESS 22: Serial Mux Control, Suggested default = 0xE4
BIT
0-1 (LSB)
TYPE
R/W
NAME
SMUX_0
2-3
R/W
4-5
R/W
6-7 (MSB)
R/W
SMUX_1
SMUX_2
SMUX_3
DESCRIPTION
Serial stream selection for serial pin P0. A four to one multiplexer allows serial
streams SOUTA (SMUX_0=0), SOUTB (SMUX_0=1), SOUTC (SMUX_0=2)
and SOUTD (SMUX_0=3) to be routed to serial pin P0. See Figure 15 for the
definition of serial streams SOUTA, SOUTB, SOUTC and SOUTD.
If SMUX_0 is set to 1 in the LINK or NIBBLE output modes then the bit order
within the nibble is reversed (nibble LSB will be on P3 rather than P0). This
allows backwards compatibility with the GC4014 in LINK mode.
Serial stream selection for serial pin P1 as above. Note that the same serial
stream may be routed to more than one serial pin if desired.
Serial stream selection for serial pin P2.
Serial stream selection for serial pin P3.
© GRAYCHIP,INC.
- 50 -
August 27, 2001
This document contains information which may be changed at any time without notice