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DS100DF410 Datasheet, PDF (15/43 Pages) Texas Instruments – Low Power 10GbE Quad Channel Retimer
DS100DF410
www.ti.com
SNLS399A – JANUARY 2012 – REVISED FEBRUARY 2013
DEVICE CONFIGURATION MODES
The DS100DF410 can be configured using two different methods.
• SMBus Master Configuration Mode
• SMBus Slave Configuration Mode
The configuration mode is selected by the state of the EN_SMB pin (pin 20) when the DS100DF410 is powered-
up. This pin should be either left floating or tied to the device VDD through an optional 1KΩ resistor. The effect of
each of these settings is shown in Table 1.
EN_SMB Pin Setting
Float
High (1)
Table 1. SMBus Enable Settings
Configuration Mode
SMBus Master Mode
SMBus Slave Mode
Description
Device reads its configuration
from an external EEPROM on
power-up
Device is configured over the
SMBus by an external controller
READ_EN Pin
Pull low to initiate reading
configuration data from external
EEPROM
Tie low to enable proper address
strapping on power-up
SMBus Master Mode and SMBus Slave Mode
In SMBus master mode the DS100DF410 reads its initial configuration from an external EEPROM upon power-
up. A description of the operation of this mode appears in a separate application note.
Some of the pins of the DS100DF410 perform the same functions in SMBus master and SMBus slave mode.
Once the DS100DF410 has finished reading its initial configuration from the external EEPROM in SMBus master
mode it reverts to SMBus slave mode and can be further configured by an external controller over the SMBus.
Two device pins initiate reading the configuration from the external EEPROM and indicate when the configuration
read is complete.
• ALL_DONE
• READ_EN
These pins are meant to work together. When the DS100DF410 is powered up in SMBus master mode, it reads
its configuration from the external EEPROM. This is triggered when the READ_EN pin goes low. When the
DS100DF410 is finished reading its configuration from the external EEPROM, it drives its ALL_DONE pin low. In
this mode, as the name suggests, the DS100DF410 acts as an SMBus master during the time it is reading its
configuration from the external EEPROM. After the DS100DF410 has finished reading its configuration from the
EEPROM, it releases control of the SMBus and becomes a SMBus slave. In applications where there is more
than one DS100DF410 on the same SMBus, bus contention can result if more than one DS100DF410 tries to
take command of the SMBus as the SMBus master at the same time. The READ_EN and ALL_DONE pins
prevent this bus contention.
In a system where the DS100DF410s are meant to operate in SMBus master mode, the READ_EN pin of one
retimer should be wired to the ALL_DONE pin of the next. The system should be designed so that the READ_EN
pin of one (and only one) of the DS100DF410s in the system is driven low on power-up. This DS100DF410 will
take command of the SMBus on power-up and will read its initial configuration from the external EEPROM. When
it is finished reading its configuration, it will set its ALL_DONE pin low. This pin should be connected to the
READ_EN pin of another DS100DF410. When this DS100DF410 senses its READ_EN pin driven low, it will take
command of the SMBus and read its initial configuration from the external EEPROM, after which it will set its
ALL_DONE pin low. By connecting the ALL_DONE pin of each DS100DF410 to the READ_EN pin of the next
DS100DF410, each DS100DF410 can read its initial configuration from the EEPROM without causing bus
contention.
For SMBus slave mode, the READ_EN pin must be tied low. Do not leave it floating or tie it high.
A connection diagram showing several DS100DF410s along with an external EEPROM and an external SMBus
master is shown in Figure 3 below. The SMBus master must be prevented from trying to take control of the
SMBus until the DS100DF410s have finished reading their initial configurations from the EEPROM.
Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS100DF410
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