TL16C552 Datasheet, PDF (11/33 Pages) Texas Instruments – DUAL ASYCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO

TL16C552
DUAL ASYCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS102B – DECEMBER 1990 – REVISED MARCH 1996
PARAMETER MEASUREMENT INFORMATION
Serial Out
(SOUT)
Interrupt
(THRE)
tpd2
IOW
(WR THR) ^{50 %}
50 %
td5
Start
Data Bits 5 – 8
50 %
td7
50 %
50 %
tpd2
50 %
50 %
Stop (1– 2)
Parity
Start
50 %
td6
50 %
50 %
tpd3
IOR
(RD IIR)
50 %
Figure 6. Transmitter Timing Waveforms
IOW
(WR THR)
Byte #1
50 %
SOUT
TXRDY
Data
tpd4
Parity
50 %
Stop
50 % Start
td8
50 %
Figure 7. Transmitter Ready Mode 0 Timing Waveforms
IOW
(WR THR)
SOUT
TXRDY
Byte #16
50 %
Data
Parity
Stop
Start
tpd4
50 %
FIFO Full
Figure 8. Transmitter Ready Mode 1 Timing Waveforms
Start of
Byte #16
td8
50 %
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