SM59R02G1 Datasheet, PDF(6/57 Page) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

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SM59R02G1 Datasheet, PDF (6/57 Pages) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

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SM59R02G1

8-Bit Micro-controller

8KB with ISP Flash

& 256B RAM embedded

CC0/T2/P1.0 1

CC1/T2EX/P1.1 2

RXD0/P1.2 3

CC2/TXD0/P1.3 4

CC3/P1.4 5

P1.5 6

P1.6 7

P1.7 8

P4.7/RESET(default) 9

RXD0/P3.0 10

TXD0/P3.1 11

INT0/P3.2 12

INT1/P3.3 13

T0/P3.4 14

T1/P3.5 15

WR/P3.6 16

RD/P3.7 17

XTAL2/P5.4 18

OSC/XTAL1/P5.5 19

VSS 20

40 VDD

39 P0.0/AD0

38 P0.1/AD1

37 P0.2/AD2

36 P0.3/AD3

35 P0.4/AD4

34 P0.5/AD5

33 P0.6/AD6

32 P0.7/AD7

31 P4.6

30 ALE/P4.5

29 P4.4

28 P2.7/A15

27 P2.6/A14

26 P2.5/A13

25 P2.4/A12

24 P2.3/A11/CC3

23 P2.2/A10/CC2

22 P2.1/A9/CC1

21 P2.0/A8/CC0

Notesï¼

1. The pin Reset/P4.7 factory default is Reset, user must keep this pin at low during power-up. User can configure it to

GPIO (P4.7) by a flash programmer.

2. To avoid accidentally entering ISP-Mode(refer to section 13.4), care must be taken not asserting pulse signal at P3.0

during power-up while P2.6, P2.7, P4.3 are set to high.

Specifications subject to change without notice contact your sales representatives for the most recent information.

ISSFD-M061

Ver.G SM59R02G1 09/2015

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