SM59R02G1 Datasheet, PDF (37/57 Pages) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

SM59R02G1
8-Bit Micro-controller
8KB with ISP Flash
& 256B RAM embedded
7.2.1. Compare Mode 0
In mode 0, when the value in Timer 2 equals the value of the compare register, the output signal changes from low to high.
It goes back to a low level on timer overflow. In this mode, writing to the port will have no effect, because the input line
from the internal bus and the write-to-latch line are disconnected. The following figure illustrates the function of compare
mode 0.
Fig. 7-1: Compare mode 0 function
Contents of
Timer 2
CRC or CCx
Reload value
CCx Output
Timer 2 = CCx value
Timer 2 overflow
7.2.2. Compare Mode 1
In compare mode 1, the transition of the output signal can be determined by software. A timer 2 overflow causes no
output change. In this mode, both transitions of a signal can be controlled. Fig. 7-2 shows a functional diagram of a
register/port configuration in compare Mode 1. In compare Mode 1, the value is written first to the “Shadow Register”,
when compare signal is active, this value is transferred to the output register.
Fig. 7-2: Compare mode 1 function
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M061
37
Ver.G SM59R02G1 09/2015