SM59R02G1 Datasheet, PDF (40/57 Pages) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

SM59R02G1
8-Bit Micro-controller
8KB with ISP Flash
& 256B RAM embedded
RB80: In modes 2 and 3, it is the 9^th data bit received. In mode 1, if SM20 is 0, RB80
is the stop bit. In mode 0, this bit is not used. Must be cleared by software.
TI0: Transmit interrupt flag, set by hardware after completion of a serial transfer.
Must be cleared by software.
RI0: Receive interrupt flag, set by hardware after completion of a serial reception.
Must be cleared by software.
Mnemonic: PFCON
7
6
5
4
-
-
S0RELPS[1:0]
3
2
T1PS[1:0]
Address: D9H
1
0 Reset
T0PS[1:0]
00H
S0RELPS[1:0]: S0REL Prescaler select
S0RELPS[1:0] Prescaler
00
Fosc/64
01
Fosc/32
T1PS[1:0]: Timer 1 Prescaler select
T1PS[1:0] Prescaler
00
Fosc/12
01
Fosc
10
Fosc/96
11
reserved
8.1. Serial interface 0
The Serial Interface 0 can operate in the following 4 modes:
SM0
0
0
1
1
SM1
0
1
0
1
Mode
0
1
2
3
Description
Shift register
8-bit UART
9-bit UART
9-bit UART
Board Rate
Fosc/12
Variable
Fosc/32 or Fosc/64
Variable
Here Fosc is the crystal or oscillator frequency.
8.1.1. Mode 0
Pin RXD0 serves as input and output. TXD0 outputs the shift clock. 8 bits are transmitted with LSB first. The baud
rate is fixed at 1/12 of the crystal frequency. Reception is initialized in Mode 0 by setting the flags in S0CON as follows:
RI0 = 0 and REN0 = 1. In the other modes, a start bit when REN0 = 1 starts receiving serial data.
Fig. 8-1: Transmit mode 0 for Serial 0
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M061
40
Ver.G SM59R02G1 09/2015