SM59R02G1 Datasheet, PDF (42/57 Pages) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

SM59R02G1
8-Bit Micro-controller
8KB with ISP Flash
& 256B RAM embedded
Fig. 8-6: Receive modes 2 and 3 for Serial 0
8.2. Multiprocessor communication of Serial Interface 0
The feature of receiving 9 bits in Modes 2 and 3 of Serial Interface 0 can be used for multiprocessor communication. In
this case, the slave processors have bit SM20 in S0CON set to 1. When the master processor outputs slave’s address, it
sets the Bit 9 to 1, causing a serial port receive interrupt in all the slaves. The slave processors compare the received byte
with their network address. If matched, the addressed slave will clear SM20 and receive the rest of the message, while
other slaves will leave SM20 bit unaffected and ignore this message. After addressing the slave, the host will output the
rest of the message with the Bit 9 set to 0, so no serial port receive interrupt will be generated in unselected slaves.
8.3. Baud rate generator
8.3.1. Serial interface 0 modes 1 and 3
(a) When BRGS = 0 (in SFR AUX):
T1PS[1:0] = 00
Baud Rate =
2^SMOD × F_OSC
32 ×12 × (256 − TH1)
T1PS[1:0] = 01
Baud Rate
=
2^SMOD × F_OSC
32× (256 − TH1)
T1PS[1:0] = 10
Baud Rate
=
2^SMOD × F_OSC
32× 96× (256 − TH1)
(b) When BRGS = 1 (in SFR AUX):
S0RELPS[1:0] = 00
S0RELPS[1:0] = 01
( ) ^{Baud Rate =}
2^SMOD × F_OSC
64 × 2¹⁰ − S0REL
( ) ^{Baud Rate =}
2^SMOD × F_OSC
32 × 2¹⁰ − S0REL
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M061
42
Ver.G SM59R02G1 09/2015