SM59R02G1 Datasheet, PDF (47/57 Pages) SyncMOS Technologies,Inc – Instruction-set compatible with MCS-51

SM59R02G1
8-Bit Micro-controller
8KB with ISP Flash
& 256B RAM embedded
Interrupt Enable 0 register(IEN0)
Mnemonic: IEN0
Address: A8h
7
6
5
4
3
2
1
0
Reset
EA
-
ET2 ES0 ET1 EX1 ET0 EX0 00h
EA: EA=0 – Disable all interrupt.
EA=1 – Enable all interrupt.
ET2: ET2=0 – Disable Timer 2 overflow or external reload interrupt.
ET2=1 – Enable Timer 2 overflow or external reload interrupt.
ES0: ES0=0 – Disable Serial channel 0 interrupt.
ES0=1 – Enable Serial channel 0 interrupt.
ET1: ET1=0 – Disable Timer 1 overflow interrupt.
ET1=1 – Enable Timer 1 overflow interrupt.
EX1: EX1=0 – Disable external interrupt 1.
EX1=1 – Enable external interrupt 1.
ET0: ET0=0 – Disable Timer 0 overflow interrupt.
ET0=1 – Enable Timer 0 overflow interrupt.
EX0: EX0=0 – Disable external interrupt 0.
EX0=1 – Enable external interrupt 0.
Interrupt Enable 1 register(IEN1)
Mnemonic: IEN1
Address: B8h
7
6
5
4
3
2
1
0
Reset
EXEN2
-
-
-
-
-
-
-
00h
EXEN2: Timer 2 reload interrupt enable.
EXEN2 = 0 – Disable Timer 2 external reload interrupt.
EXEN2 = 1 – Enable Timer 2 external reload interrupt.
Interrupt Enable 2 register(IEN2)
Mnemonic: IEN2
Address: 9Ah
7
6
5
4
3
2
1
0
Reset
-
-
-
-
-
-
IEWDT
-
00h
IEWDT: WDT interrupt enable..
IEWDT = 0 – Disable WDT interrupt.
IEWDT = 1 – Enable WDT interrupt.
Interrupt request register(IRCON)
Mnemonic: IRCON
Address: C0h
7
6
5
4
3
2
1
0
Reset
EXF2 TF2
-
-
-
-
-
-
00H
EXF2: Timer 2 external reloads flag. Must be cleared by software.
TF2: Timer 2 overflows flag. Must be cleared by software.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M061
47
Ver.G SM59R02G1 09/2015