M36W0R6030T0 Datasheet, PDF(7/26 Page) STMicroelectronics – 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package

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M36W0R6030T0 Datasheet, PDF (7/26 Pages) STMicroelectronics – 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package

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M36W0R6030T0, M36W0R6030B0

SRAM Lower Byte Enable (LBS). The Lower

Byte Enable input enables the lower byte for

SRAM (DQ0-DQ7). LBS is active low.

VDDF Supply Voltage. VDDF provides the power

supply to the internal core of the Flash memory

component. It is the main power supplies for all

Flash memory operations (Read, Program and

Erase).

VDDS Supply Voltage. VDDS provides the power

supply to the internal core of the SRAM device. It

is the main power supply for all SRAM operations.

VDDQ Supply Voltage. VDDQ provides the power

supply for the Flash Memory and SRAM I/O pins.

This allows all Outputs to be powered indepen-

dently of the Flash Memory and SRAM core power

supplies: VDDF and VDDS, respectively.

VPPF Program Supply Voltage. VPPF is both a

Flash memory control input and a Flash memory

power supply pin. The two functions are selected

by the voltage range applied to the pin.

If VPPF is kept in a low voltage range (0V to VDDQ)

VPPF is seen as a control input. In this case a volt-

age lower than VPPLKF gives an absolute protec-

tion against Program or Erase, while VPPF > VPP1F

enables these functions (see Tables 6 and 7, DC

Characteristics for the relevant values). VPPF is

only sampled at the beginning of a Program or

Erase; a change in its value after the operation has

started does not have any effect and Program or

Erase operations continue.

If VPPF is in the range of VPPHF it acts as a power

supply pin. In this condition VPPF must be stable

until the Program/Erase algorithm is completed.

VSS Ground. VSS is the common ground refer-

ence for all voltage measurements in the Flash

(core and I/O Buffers) and SRAM chips.

Note: Each Flash memory device in a system

should have its supply voltage (VDDF) and the

program supply voltage VPPF decoupled with a

0.1ÂµF ceramic capacitor close to the pin (high

frequency, inherently low inductance capaci-

tors should be as close as possible to the

package). See Figure 7., AC Measurement

Load Circuit. The PCB track widths should be

sufficient to carry the required VPPF program

and erase currents.

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