English
Language : 

M36W0R6030T0 Datasheet, PDF (24/26 Pages) STMicroelectronics – 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package
M36W0R6030T0, M36W0R6030B0
PART NUMBERING
Table 13. Ordering Information Scheme
Example:
M36 W0 R 6 0 3 0 T 0 ZAQ T
Device Type
M36 = Multi-Chip Package (Flash + RAM)
Flash 1 Architecture
W = Multiple Bank, Burst mode
Flash 2 Architecture
0 = none present
Operating Voltage
R = VDDF = VDDQ =VDDP = 1.7 to 1.95V
Flash 1 Density
6 = 64 Mbit
Flash 2 Density
0 = none present
RAM 1 Density
3 = 8 Mbit
RAM 0 Density
0 = none present
Parameter Blocks Location
T = Top Boot Block Flash
B = Bottom Boot Block Flash
Product Version
0 = 0.13µm Flash technology, 70ns; 0.13µm RAM, 70ns speed
Package
ZAQ = Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch
Option
Blank = Standard Packing
T = Tape & Reel Packing
E = Lead-free and RoHS Package, Standard Packing
F = Lead-free and RoHS Package, Tape & Reel Packing
Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available op-
tions (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST-
Microelectronics Sales Office nearest to you.
24/26