M36DR432AD Datasheet, PDF(22/52 Page) STMicroelectronics – 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product

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M36DR432AD Datasheet, PDF (22/52 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product

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M36DR432AD, M36DR432BD

Error Bit (DQ5). The Error Bit can be used to

identify if an error occurs during a program or

erase operation.

The Error Bit is set to â1â when a program or erase

operation has failed. When it is set to â0â the pro-

gram or erase operation was successful.

If any Program command is used to try to set a bit

from â0â to â1â Status Register Error bit DQ5 will be

set to â1â, only if VPP is in the range of 11.4V to

12.6V.

The Error Bit is reset by a Read/Reset command.

Erase Timer Bit (DQ3). The Erase Timer bit is

used to indicate the timeout period for an erase

operation.

When the last block Erase command has been en-

tered to the Command Interface and it is waiting

for the erase operation to start, the Erase Timer Bit

is set to â0â. When the erase timeout period is fin-

ished, DQ3 returns to â1â, (80Âµs to 120Âµs).

DQ0, DQ1 and DQ4 are reserved for future use

and should be masked.

Table 11. Polling and Toggle Bits

Mode

DQ7 DQ6 DQ2

Program

DQ7 Toggle

Erase

Toggle N/A

Erase Suspend Read

(in Erase Suspend

block)

Toggle

Erase Suspend Read

(outside Erase Suspend

block)

DQ7

DQ6

DQ2

Erase Suspend Program DQ7 Toggle

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