M36DR432AD Datasheet, PDF (1/52 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product

M36DR432AD
M36DR432BD
32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory
and 4 Mbit (256Kb x16) SRAM, Multiple Memory Product
FEATURES SUMMARY
s Multiple Memory Product
– 1 bank of 32 Mbit (2Mb x16) Flash Memory
– 1 bank of 4 Mbit (256Kb x16) SRAM
s SUPPLY VOLTAGE
– V_DDF = V_DDS =1.65V to 2.2V
– V_PPF = 12V for Fast Program (optional)
s ACCESS TIMES: 85ns, 100ns, 120ns
s LOW POWER CONSUMPTION
s ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code, M36DR432AD: 00A0h
– Bottom Device Code, M36DR432BD: 00A1h
FLASH MEMORY
s MEMORY BLOCKS
– Dual Bank Memory Array: 4 Mbit, 28 Mbit
– Parameter Blocks (Top or Bottom location)
s PROGRAMMING TIME
– 10µs by Word typical
– Double Word Program Option
s ASYNCHRONOUS PAGE MODE READ
– Page Width: 4 Words
– Page Access: 35ns
– Random Access: 85ns, 100ns, 120ns
s DUAL BANK OPERATIONS
– Read within one Bank while Program or
Erase within the other
– No delay between Read and Write operations
s BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WPF for Block Lock-Down
s COMMON FLASH INTERFACE (CFI)
– 64 bit Unique Device Identifier
– 64 bit User Programmable OTP Cells
Figure 1. Package
FBGA
Stacked LFBGA66 (ZA)
12 x8mm
s ERASE SUSPEND and RESUME MODES
s 100,000 PROGRAM/ERASE CYCLES per
BLOCK
s 20 YEARS DATA RETENTION
– Defectivity below 1ppm/year
SRAM
s 4 Mbit (256Kb x16)
s LOW V_DDS DATA RETENTION: 1.0V
s POWER DOWN FEATURES USING TWO
CHIP ENABLE INPUTS
February 2003
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