MB84VD2118XEM-70 Datasheet, PDF (6/52 Pages) SPANSION – Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS

MB84VD2118XEM/2119XEM-70
s DEVICE BUS OPERATIONS
User Bus Operations Table (Flash=Word mode; CIOf=VCCf, SRAM=Word mode; CIOs=VCCs)
Operation *^1, *³
WP/
CEf CE1s CE2s OE WE SA LB UB DQ7 to DQ0 DQ15 to DQ8 RESET ACC
*⁵
Full Standby
H
H
X
X
XXXX X
L
High-Z
High-Z
H
X
Output Disable
HL
H
L
X
HHXX X
H
XXXHH
X
HHXX X
L
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
H
X
HX
Read from Flash *² L
LHXX X
XL
DOUT
DOUT
H
X
Write to Flash
HX
L
HLXXX
DIN
XL
DIN
H
X
LL
DOUT
DOUT
Read from SRAM H L H L H X H L High-Z
DOUT
H
X
LH
DOUT
High-Z
LL
DIN
DIN
Write to SRAM
H L H X L X H L High-Z
DIN
H
X
LH
DIN
High-Z
Temporary Sector
Group
X X X XXXXX
X
Unprotection *⁴
X
VID
X
Flash Hardware
Reset
H
X
X
X
XXXX X
L
High-Z
High-Z
L
X
Boot Block Sector
Write Protection
X
X
X XXXXX
X
X
X
L
Legend: L = VIL, H = VIH, X = VIL or VIH. See DC Characteristics for voltage levels.
*1 : Other operations except for indicated this column are inhibited.
*2 : WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
*3 : Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH at a time.
*4 : It is also used for the extended sector group protections.
*5 : WP/ACC = VIL; protection of boot sectors.
WP/ACC = VIH; removal of boot sectors protection.
WP/ACC = VACC (9 V) ; Program time will reduce by 40%.
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