MB84VD2118XEM-70 Datasheet, PDF (29/52 Pages) SPANSION – Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS

MB84VD2118XEM/2119XEM-70
• Erase/Program Operations (Flash)
Parameter
Symbol
JEDEC Standard Min
Write Cycle Time
tAVAV
tWC
70
Address Setup Time (WE to Addr.)
tAVWL
tAS
0
Address Setup Time to CEf Low During Toggle Bit Polling
—
tASO
12
Address Hold Time (WE to Addr.)
tWLAX
tAH
45
Address Hold Time from CEf or OE High During Toggle Bit
Polling
—
tAHT
0
Data Setup Time
tDVWH
tDS
30
Data Hold Time
tWHDX
tDH
0
Output Enable Setup Time
—
tOES
0
Output Enable Hold Time
Read
Toggle and Data Polling
0
—
tOEH
10
CEf High During Toggle Bit Polling
—
tCEPH
20
OE High During Toggle Bit Polling
—
tOEPH
20
Read Recover Time Before Write (OE to CEf)
tGHEL
tGHEL
0
Read Recover Time Before Write (OE to WE)
tGHWL
tGHWL
0
WE Setup Time (CEf to WE)
tWLEL
tWS
0
CEf Setup Time (WE to CEf)
tELWL
tCS
0
WE Hold Time (CEf to WE)
tEHWH
tWH
0
CEf Hold Time (WE to CEf)
tWHEH
tCH
0
Write Pulse Width
tWLWH
tWP
35
CEf Pulse Width
tELEH
tCP
35
Write Pulse Width High
tWHWL
tWPH
25
CEf Pulse Width High
tEHEL
tCPH
25
Byte Programming Operation
Word Programming Operation
—
tWHWH1
tWHWH1
—
Sector Erase Operation *¹
tWHWH2
tWHWH2
—
VCCf Setup Time
—
tVCS
50
Voltage Transition Time *²
—
tVLHT
4
Rise Time to VID *²
—
tVIDR
500
Rise Time to VACC
—
tVACCR
500
Recover Time from RY/BY
—
tRB
0
RESET Pulse Width
—
tRP
500
Delay Time from Embedded Output Enable
—
tEOE
—
RESET Hold Time Before Read
—
tRH
200
Program/Erase Valid to RY/BY Delay
—
tBUSY
—
Erase Time-out Time *³
—
tTOW
50
Erase Suspend Transition Time *⁴
—
tSPD
—
Value
Typ Max
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
——
8
—
16 —
1
—
——
——
——
——
——
——
— 70
——
— 90
——
— 20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
s
µs
µs
ns
ns
ns
ns
ns
ns
ns
µs
µs
29