MB84VD2118XEM-70 Datasheet, PDF (4/52 Pages) SPANSION – Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS

MB84VD2118XEM/2119XEM-70
s PIN DESCRIPTION
Pin Name
A17 to A0
A19, A18, A-1
SA
DQ15 to DQ0
CEf
CE1s
CE2s
OE
WE
RY/BY
UB
LB
CIOf
CIOs
RESET
WP/ACC
N.C.
VSS
VCCf
VCCs
Function
Address Inputs (Common)
Address Input (Flash)
Address Input (SRAM)
Data Inputs / Outputs (Common)
Chip Enable (Flash)
Chip Enable (SRAM)
Chip Enable (SRAM)
Output Enable (Common)
Write Enable (Common)
Ready/Busy Outputs (Flash) Open Drain
Output
Upper Byte Control (SRAM)
Lower Byte Control (SRAM)
I/O Configuration (Flash)
CIOf=VCCf is Word mode ( ×16),
CIOf=VSS is Byte mode ( × 8)
I/O Configuration (SRAM)
CIOs=VCCs is Word mode ( ×16),
CIOs=VSS is Byte mode ( × 8)
Hardware Reset Pin / Sector Protection
Unlock (Flash)
Write Protect / Acceleration (Flash)
No Internal Connection
Device Ground (Common)
Device Power Supply (Flash)
Device Power Supply (SRAM)
I/O
I
I
I
I/O
I
I
I
I
I
O
I
I
I
I
I
I
—
Power
Power
Power
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