MB84VD2118XEM-70 Datasheet, PDF (32/52 Pages) SPANSION – Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS

MB84VD2118XEM/2119XEM-70
• Write Cycle (CEf control) (Flash)
Address
WE
OE
CEf
DQ
3rd Bus Cycle
555h
PA
tWC
tAS
tAH
tWS
tWH
tGHEL
tCP
tCPH
tDS
A0h
tDH
PD
Data Polling
PA
tWHWH1
DQ7 DOUT
Notes : • PA is address of the memory location to be programmed.
• PD is data to be programmed at byte address.
• DQ7 is the output of the complement of the data written to the device.
• DOUT is the output of the data written to the device.
• Figure indicates last two bus cycles out of four bus cycle sequence.
• These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.)
32