LAN9312 Datasheet, PDF (420/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

14.5.4.9
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Buffer Manager Reset Status Register (BM_RST_STS)
Register #:
1C08h
Size:
32 bits
This register indicates when the Buffer Manager has been initialized by the reset process.
BITS
DESCRIPTION
31:1 RESERVED
0 BM Ready
When set, indicates the Buffer Manager tables have finished being initialized
by the reset process. The initialization is performed upon any reset that
resets the switch fabric.
TYPE
RO
RO
SS
DEFAULT
-
Note 14.63
Note 14.63 The default value of this bit is 0 immediately following any switch fabric reset and then self-
sets to 1 once the ALR table is initialized.
Revision 1.2 (04-08-08)
420
DATASHEET
SMSC LAN9312