LAN9312 Datasheet, PDF (124/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

9.8.1
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9312 in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The buffer format is illustrated in Figure 9.4.
9.8.2
Host Write
Order ³¹
0
1st
TX Command 'A'
2nd
TX Command 'B'
3rd
Optional offset DWORD0
.
.
.
Optional offset DWORDn
Offset + Data DWORD0
.
.
.
.
.
Last Data & PAD
Optional Pad DWORD0
.
.
.
Last
Optional Pad DWORDn
Figure 9.4 TX Buffer Format
Figure 9.4 shows the TX Buffer as it is written into the LAN9312. It should be noted that not all of the
data shown in this diagram is actually stored in the TX Data FIFO. This must be taken into account
when calculating the actual TX Data FIFO usage. Please refer to Section 9.8.5, "Calculating Actual TX
Data FIFO Usage" for a detailed explanation on calculating the actual TX Data FIFO usage.
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
There is a 16-bit Packet Tag in the TX command ‘B’ command word. Packet Tags may, if host software
desires, be unique for each packet (i.e., an incrementing count). The value of the tag will be returned
in the TX status word for the associated packet. The Packet tag can be used by host software to
uniquely identify each status word as it is returned to the host.
Revision 1.2 (04-08-08)
124
DATASHEET
SMSC LAN9312