LAN9312 Datasheet, PDF (356/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.34 Port x MAC Transmit Undersize Count Register (MAC_TX_UNDSZE_CNT_x)
Register #:
Port0: 045Ah
Port1: 085Ah
Port2: 0C5Ah
Size:
32 bits
This register provides a counter of undersized packets transmitted by the port. The counter is cleared
upon being read.
BITS
DESCRIPTION
31:0 TX Undersize
Count of packets that have less than 64 bytes.
Note: This condition could occur when TX padding is disabled and a tag
is removed.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 458 hours.
TYPE
RC
DEFAULT
00000000h
Revision 1.2 (04-08-08)
356
DATASHEET
SMSC LAN9312