LAN9312 Datasheet, PDF (413/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.4.2 Buffer Manager Drop Level Register (BM_DROP_LVL)
Register #:
1C01h
Size:
This register configures the overall buffer usage limits.
32 bits
BITS
DESCRIPTION
31:16 RESERVED
15:8 Drop Level Low
These bits specify the buffer limit that can be used per ingress port during
times when 2 or 3 ports are active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
7:0 Drop Level High
These bits specify the buffer limit that can be used per ingress port during
times when 1 port is active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
TYPE
RO
R/W
R/W
DEFAULT
-
49h
64h
SMSC LAN9312
413
DATASHEET
Revision 1.2 (04-08-08)