LAN9312 Datasheet, PDF (185/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.2.2.5 TX FIFO Information Register (TX_FIFO_INF)
Offset:
080h
Size:
32 bits
This register contains the indication of free space in the TX Data FIFO and the used space in the TX
Status FIFO.
BITS
DESCRIPTION
31:24 RESERVED
23:16
15:0
TX Status FIFO Used Space (TXSUSED)
This field indicates the amount of space, in DWORD’s, currently used in the
TX Status FIFO.
TX Data FIFO Free Space (TXFREE)
This field indicates the amount of space, in bytes, available in the TX Data
FIFO. The application should never write more than is available, as indicated
by this value.
TYPE
RO
RO
RO
DEFAULT
-
0b
1200h
SMSC LAN9312
185
DATASHEET
Revision 1.2 (04-08-08)