LAN9312 Datasheet, PDF (382/458 Pages) SMSC Corporation – High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.3.14 Switch Engine DIFFSERV Table Read Data Register (SWE_DIFFSERV_TBL_RD_DATA)
Register #:
1813h
Size:
This register is used to read the DIFFSERV table.
32 bits
BITS
DESCRIPTION
31:3 RESERVED
2:0 DIFFSERV Priority
These bits specify the assigned receive priority for IP packets with a ToS/CS
field that matches this index.
TYPE
RO
RO
DEFAULT
-
000b
Revision 1.2 (04-08-08)
382
DATASHEET
SMSC LAN9312