COM20022I-3.3V Datasheet, PDF (35/73 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
BIT
BIT NAME
4,3 Extended
Timeout 1,2
2 Backplane
1,0 Sub Address 1,0
SYMBOL
ET1, ET2
BACK-
PLANE
DESCRIPTION
These bits allow the network to operate over longer
distances than the default maximum 1 mile by controlling
the Response, Idle, and Reconfiguration Times. All nodes
should be configured with the same timeout values for
proper network operation. For the COM20022I 3V with a
20 MHz crystal oscillator, the bit combinations follow:
Reconfig
Response Idle Time Time
ET2
ET1 Time (μS) (μS)
(mS)
0
0
298.4
328
420
0
1
149.2
164
420
1
0
74.7
82
420
1
1
18.7
20.5
210
Note: These values are for
10Mbps and RCNTMR[1,0]=00.
Reconfiguration time is changed by the RCNTMR1
and RCNTMR0 bits.
A logic "1" on this bit puts the device into Backplane Mode
signaling which is used for Open Drain and Differential
Driver interfaces.
SUBAD 1,0 These bits determine which register at address 07 may be
accessed. The combinations are as follows:
SUBAD1
SUBAD0
0
0
0
1
1
0
1
1
See also the Sub Address Register.
Register
Tentative ID
Node ID
Setup 1
Next ID
SMSC COM20022I 3.3V Rev.C
Page 35
DATASHEET
Revision 03-08-07