COM20022I-3.3V Datasheet, PDF (32/73 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
DATA
0000 0000
0000 0001
0000 0010
b0fn n100
00fn n011
0000 c101
000r p110
0000 1000
0001 1000
COMMAND
Clear
Transmit
Interrupt
Disable
Transmitter
Disable
Receiver
Enable
Receive to
Page fnn
Enable
Transmit from
Page fnn
Define
Configuration
Clear Flags
Clear
Receive
Interrupt
Start Internal
Operation
Table 6.7 - Command Register
DESCRIPTION
This command is used only in the Command Chaining
operation. Please refer to the Command Chaining section for
definition of this command.
This command will cancel any pending transmit command
(transmission that has not yet started) and will set the TA
(Transmitter Available) status bit to logic "1" when the
COM20022I 3V next receives the token.
This command will cancel any pending receive command. If the
COM20022I 3V is not yet receiving a packet, the RI (Receiver
Inhibited) bit will be set to logic "1" the next time the token is
received. If packet reception is already underway, reception will
run to its normal conclusion.
This command allows the COM20022I 3V to receive data
packets into RAM buffer page fnn and resets the RI status bit to
logic "0". The values placed in the "nn" bits indicate the page
that the data will be received into (page 0, 1, 2, or 3). If the
value of "f" is a logic "1", an offset of 256 bytes will be added to
that page specified in "nn", allowing a finer resolution of the
buffer. Refer to the Selecting RAM Page Size section for further
detail. If the value of "b" is logic "1", the device will also receive
broadcasts (transmissions to ID zero). The RI status bit is set to
logic "1" upon successful reception of a message.
This command prepares the COM20022I 3V to begin a transmit
sequence from RAM buffer page fnn the next time it receives
the token. The values of the "nn" bits indicate which page to
transmit from (0, 1, 2, or 3). If "f" is logic "1", an offset of 256
bytes is the start of the page specified in "nn", allowing a finer
resolution of the buffer. Refer to the Selecting RAM Page Size
section for further detail. When this command is loaded, the TA
and TMA bits are reset to logic "0". The TA bit is set to logic "1"
upon completion of the transmit sequence. The TMA bit will
have been set by this time if the device has received an ACK
from the destination node. The ACK is strictly hardware level,
sent by the receiving node before its microcontroller is even
aware of message reception. Refer to Figure 3.1 - COM20022I
3V Operation for details of the transmit sequence and its
relation to the TA and TMA status bits.
This command defines the maximum length of packets that may
be handled by the device. If "c" is a logic "1", the device
handles both long and short packets. If "c" is a logic "0", the
device handles only short packets.
This command resets certain status bits of the COM20022I 3V.
A logic "1" on "p" resets the POR status bit and the EXCNAK
Diagnostic status bit. A logic "1" on "r" resets the RECON
status bit.
This command is used only in the Command Chaining
operation. Please refer to the Command Chaining section for
definition of this command.
This command restarts the stopped internal operation after
changing CKUP1 or CKUP0 bit.
Revision 03-08-07
Page 32
DATASHEET
SMSC COM20022I 3.3V Rev.C