91C100FDREVB Datasheet, PDF (10/68 Pages) SMSC Corporation – FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY

Table 1 - LAN91C100FD Pin Requirements
FUNCTION
PIN SYMBOLS
System Address Bus
A1-A15, AEN, nBE0-nBE3
System Data Bus
D0-D31
System Control Bus
Serial EEPROM
RAM Data Bus
RESET, nADS, LCLK, ARDY,
nRDYRTN, nSRDY, INTR0-
INTR3, nLDEV, nRD, nWR,
nDATACS, nCYCLE, W/nR,
nVLBUS
EEDI, EEDO, EECS, EESK,
ENEEP, IOS0-IOS2
RD0-RD31
RAM Address Bus
RA2-RA16
RAM Control Bus
Crystal Oscillator
nROE, nRWE0-nRWE3,
RCVDMA, RDMAH
XTAL1, XTAL2
Power
VDD, AVDD
Ground
GND, AGND
External ENDEC 10 Mbps
Physical Interface 100 Mbps
Clocks
TXEN, TXD, CRS, COL, RXD,
TXC, RXC, LBK, nLNK,
nFSTEP, AUISEL, MIISEL
TXEN100, CRS100, COL100,
RX_DV, RX_ER, TXD0-TXD3,
RXD0-RXD3, MDI, MDO, MCLK
TX25, RX25
Miscellaneous
nCSOUT, nRXDISC
TOTAL
NUMBER OF PINS
20
32
17
8
32
15
7
2
19
21
12
16
2
2
205
SERIAL
EEPROM
Address
BUS
Data
INTERFACE
Control
UNIT
RD
FIFO
WR
FIFO
ARBITER
MEMORY
MANAGEMENT
UNIT
DIRECT
MEMORY
ACCESS
10 Mb
Interface
MEDIA
ACCESS
CONTROL
100
Media
Independent
Interface
RAM
25 MHz
FIGURE 1 - LAN91C100FD BLOCK DIAGRAM
SMSC DS – LAN91C100FD REV. B
Page 10
Rev. 05/31/2000