SI5364 Datasheet, PDF (8/40 Pages) Silicon Laboratories – SONET/SDH PRECISION PORT CARD CLOCK IC

Si5364
Table 3. AC Characteristics
(V_DD33 = 3.3 V ±5%, T_A = –20 to 85 °C)
Parameter
Input Clock Frequency (non FEC)^*
FEC[1:0] = 00
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
Symbol
f_CLKIN
Test Condition
No FEC Scaling
Min Typ Max Unit
19.436 — 21.093 MHz
Input Clock Frequency (forward
FEC)^* FEC[1:0] = 01
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
f_CLKIN
255/238 FEC Scaling 18.140 — 19.687 MHz
Input Clock Frequency (reverse
FEC)^*
FEC[1:0] = 10
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
f_CLKIN
238/255 FEC Scaling 20.824 — 22.600 MHz
Input Clock Rise Time (CLKIN_A,
t_R
CLKIN_B, REF/CLKIN_F)
Figure 2
—
—
11
ns
Input Clock Fall Time (CLKIN_A,
t_F
CLKIN_B, REF/CLKIN_F)
Figure 2
—
—
11
ns
Input Clock Duty Cycle
C_{DUTY_IN}
40
50
60
%
Frequency Difference at which
Frequency Offset Alarm (FOS_A,
FOS_B) is declared
(CLKIN_A vs. REF/CLKIN_F,
CLKIN_B vs. REF/CLKIN_F)
SMC/S3N = 1 (SONET Min. Clock)
SMC/S3N = 0 (Stratum 3/3E)
∆f_FOS
SMC
Stratum3/3E
40
—
72 ±ppm
9.2
—
16.6 ±ppm
CLKOUT[3:0] Frequency Range^*
FRQSEL[1:0] = 00 (no output)
FRQSEL[1:0] = 01 (1X)
FRQSEL[1:0] = 10 (8X)
FRQSEL[1:0] = 11 (32X)
f_{O_19}
f_{O_155}
f_{O_622}
—
—
—
19.436 — 21.093 MHz
155.48 — 168.75 MHz
621.95 ^{— 675.0 MHz}
CLKOUT_[3:0] Rise Time
t_R
Figure 2; single-ended; —
187 260 ps
after 3 cm of 50 Ω FR4
stripline
CLKOUT_[3:0] Fall Time
t_F
Figure 2; single-ended; —
176 260 ps
after 3 cm of 50 Ω FR4
stripline
*Note: The Si5364 provides a 1, 8, or 32x clock frequency multiplication function with an option for additional frequency
scaling by a factor of 255/238 or 238/255 for FEC rate compatibility.
8
Rev. 2.2