SI5364 Datasheet, PDF (25/40 Pages) Silicon Laboratories – SONET/SDH PRECISION PORT CARD CLOCK IC

Si5364
Top View
1
2
3
4
5
6
7
8
9
10
A
BWSEL[0]
FEC[0] MANCNTRL[0] FOS_A
FOS_B
A_ACTV
B_ACTV
F_ACTV
DH_ACTV
Rsvd_G Rsvd_G Rsvd_G
B
AUTOSEL BWSEL[1]
FEC[1] MANCNTRL[1] DSBLFOS RsNvdD_NC
RsNvdD_NC
RsNvdD_NC SMC/S3N CAL_ACTV
Rsvd_G Rsvd_G Rsvd_G Rsvd_G Rsvd_G Rsvd_G Rsvd_G
C
CLKIN_A– CLKIN_A+ INCNDDELAY DECNDDELAY FXDNDDELAY RsNvdD_NC RsvNd_DGND RsvNd_DGND RsvNd_DGND
RVRT
Rsvd_G
D
Rsvd_GND RsvNd_DGND
VSEL33
GND
GND
GND
GND
GND
GND
LOS_F
E
REF/CLKIN_F– REF/CLKIN_F+ GND
VDD33
VDD33
VDD33
VDD25
VDD25
VDD25
LOS_B
Rsvd_G
F
Rsvd_GND RsvNd_DGND
GND
VDD33
VDD33
VDD33
VDD25
VDD25
VDD25
LOS_A
G
CLKIN_B+ CLKIN_B–
GND
VDD25
VDD25
VDD25
VDD25
VDD25 FRQSEL_4[0] CLKOUT_4–
H
SYNCIN DSBLFSYNC
GND
GND
GND
GND
GND
VDD25 FRQSEL_4[1] CLKOUT_4+
J
FSYNC
VALTIME FRQSEL_1[0] FRQSEL_1[1]
GND
FRQSEL_2[0] FRQSEL_2[1] VDD25 FRQSEL_3[1] FRQSEL_3[0]
K
REXT
RSTN/CAL CLKOUT_1– CLKOUT_1+
GND
CLKOUT_2+ CLKOUT_2– VDD25 CLKOUT_3– CLKOUT_3+
Figure 15. Si5364 Pin Configuration (Transparent Top View)
Rev. 2.2
25