SI5100 Datasheet, PDF (33/40 Pages) Silicon Laboratories – SiPHY™ OC-48/STM-16 SONET/SDH TRANSCEIVER

Pin Number(s)
J13
K13
J14
K14
L13
M13
L14
M14
N14
N13
P14
P13
N12
N11
P12
P11
N10
N9
P10
P9
N8
N7
P8
P7
N6
N5
P6
P5
N4
N3
P4
P3
K1
L1
Name
TXDIN15+
TXDIN15–
TXDIN14+
TXDIN14–
TXDIN13+
TXDIN13–
TXDIN12+
TXDIN12–
TXDIN11+
TXDIN11–
TXDIN10+
TXDIN10–
TXDIN9+
TXDIN9–
TXDIN8+
TXDIN8–
TXDIN7+
TXDIN7–
TXDIN6+
TXDIN6–
TXDIN5+
TXDIN5–
TXDIN4+
TXDIN4–
TXDIN3+
TXDIN3–
TXDIN2+
TXDIN2–
TXDIN1+
TXDIN1–
TXDIN0+
TXDIN0–
TXDOUT+
TXDOUT–
M5
TXLOL
Si5100
I/O Signal Level
Description
I
LVDS
Differential Parallel Transmit Data Input.
The 4-bit or 16-bit data word present on these
pins is multiplexed into a high-speed serial
stream and output on TXDOUT. The data word
size is set by the MODE16 input. The bit order
for transmit multiplexing is selected by the
TXMSBSEL input. The data on TXDIN[15:0] is
clocked into the device by the rising edge of
TXCLK16IN.
O
CML
Differential High-Speed Transmit Data
Output.
The 4-bit or 16-bit word input on TXDIN[15:0] is
multiplexed into a high-speed serial stream that
is output on the TXDOUT pins. The data word
size is set by the MODE16 input. The bit order
for transmit multiplexing is selected by the
TXMSBSEL input. The TXDOUT outputs are
updated by the rising edge of TXCLKOUT.
O
LVTTL Transmit CMU Loss-of-Lock.
The TXLOL output is asserted (low) when the
CMU is not phase-locked to the selected refer-
ence source or if REFCLK is not present. See
LOL in Table 5 on page 10.
Rev. 1.1
33