SI5100 Datasheet, PDF (11/40 Pages) Silicon Laboratories – SiPHY™ OC-48/STM-16 SONET/SDH TRANSCEIVER

Table 6. AC Characteristics (Transmitter Clock Multiplier)¹
(V_DD = 1.8 V ±5%, T_A = –20 to 85 °C)
Parameter
Symbol
Test Condition
Jitter Transfer Bandwidth
(OC–48: 2.48832 Gbps)
J_BW
BWSEL[1:0] = 00
BWSEL[1:0] = 01
BWSEL[1:0] = 10
BWSEL[1:0] = 11
Jitter Transfer Bandwidth
(FEC: 2.66667 Gbps)
J_BW
BWSEL[1:0] = 00
BWSEL[1:0] = 01
BWSEL[1:0] = 10
BWSEL[1:0] = 11
Jitter Transfer Peaking
Acquisition Time
T_AQ
Input Reference Clock Frequency RC_FREQ
Valid REFCLK
REFRATE = 1
REFRATE = 0
Input Reference Clock Duty
Cycle
RC_DUTY
Input Reference Clock Frequency RC_TOL
Tolerance
Random rms Jitter Generation,
TXCLKOUT (PRBS 31)²
J_GEN(rms)
BWSEL[1:0] = 00
BWSEL[1:0] = 01
BWSEL[1:0] = 10
BWSEL[1:0] = 11
Total Peak-to-Peak Jitter Genera- J_GEN(pp)
tion, TXCLKOUT, TXDOUT
(PRBS 31)²
BWSEL[1:0] = 00
BWSEL[1:0] = 01
BWSEL[1:0] = 10
BWSEL[1:0] = 11
Notes:
1. Bellcore specifications: GR-253-CORE, Issue 3, September 2000.
2. Full duplex; REFCLK = 155 MHz.
Si5100
Min Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.05
—
—
—
155
—
78
40
—
–100
—
—
2.5
—
2.0
—
1.7
—
1.7
—
25.5
—
24.0
—
22.0
—
22.0
Max Unit
12
kHz
50
kHz
120 kHz
200 kHz
12
kHz
50
kHz
120 kHz
200 kHz
0.1
dB
20
ms
169 MHz
84.4
60
%
100 ppm
3.4 mUI_rms
2.4 mUI_rms
2.1 mUI_rms
1.8 mUI_rms
34 mUI_pp
33 mUI_pp
27 mUI_pp
26 mUI_pp
Rev. 1.1
11