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S1011 Datasheet, PDF (35/43 Pages) Seiko Instruments Inc – BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR
HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR
Rev.1.2_00
S-1011 Series
3. Detection delay time (tRESET) vs. Power supply voltage (VDD)
3. 1 SENSE detection product
S-1011E50
12.0
CN = 3.3 nF
11.0
Ta = +25°C Ta = +85°C
10.0
9.0
8.0
0.0
Ta = −40°C
6.0 12.0 18.0 24.0 30.0 36.0
VDD [V]
VIH*1
1 s
Input voltage
VIL*2
VDD
tRESET
Output voltage
VDD  50%
VSS
*1. VIH = −VDET(S) + 1.0 V
*2. VIL = −VDET(S) − 1.0 V
Figure 47 Test Condition of Detection Delay Time
VDD
+
V
VDD
SENSE
VSS CP
OUT
CN
VSENSE
CN
R
100 kΩ
+
V
Figure 48 Test Circuit of Detection Delay Time
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Seiko Instruments Inc.
35