SDA9206 Datasheet, PDF (29/54 Pages) Siemens Semiconductor Group – ADC with Built in Antialiasing filter and Clock generation UnitS

SDA 9206
2.4.4 Detailed Description
Subaddress 00_H
Bit
Name Function
D7
0
Reserved
D6
UV3FIL Filter stage 3 for UV data (FORMAT = 0X)
0:
OFF
1:
ON
Note: For FORMAT = 1X filter stage 3 for UV data is “on”
(UV3FIL = don´t care)
D5...D4
FORMAT Selection of output data interface:
00:
Output data format according CCIR 656 (8 wires at Port A)
01:
Parallel output data format (2 x 8 wires)
10:
Quasiparallel 12 wire interface
11:
Quasiparallel 12 wire interface
D3
UVCODE Coding of UV data:
0:
Straight binary code
1:
Two’s complement code
D2
YCODE Coding of Y data:
0:
Straight binary code
1:
Two’s complement code
D1
OENB Output enable port B:
0:
Tristate
1:
Port enabled
D0
OENA Output enable port A:
0:
Tristate
1:
Port enabled
Semiconductor Group
29
1999-02-10