SDA9206 Datasheet, PDF (10/54 Pages) Siemens Semiconductor Group – ADC with Built in Antialiasing filter and Clock generation UnitS

SDA 9206
1.4 Pin Description (cont’d)
Pin No.
20
24 ... 31
33
34
35
37 ... 44
46
47
48
49
51
52
53
54
56
57
58
59
60
61
62
Symbol Type
H2I2
Q/TTL
PAQ7 ... 0 Q/TTL
SDA
IQ
SCL
I
ADR0 I/TTL/pd
PBQ7... 0 Q/TTL
V_DDDTO
X2
S
Q/ana
X1
I/ana
V_SSDTO
VS
S
Q/TTL
CLK2 Q/TTL
CLK1 Q/TTL
HS
TEST
Q/TTL
I/TTL/pd
EXSYN I/TTL/pd
V_AGNDPA
V_ADDPA
V_AGNDC
V_REFLC
SYNC
I/ana
Description
Pin function defined by I²C Bus:
Line frequent pulse output or
programmable digital control output
Data output Port A (see Data Format)
I²C-Bus data line
I²C-Bus clock line
I²C-Chip select
Data output port B (see Data Format)
Positive supply voltage of DTO (5 V)
Crystal connection
Crystal connection (clock input)
Ground of DTO
Vertical sync pulse output
Clock out: tristate / 6.75 / 13.5 / 27 MHz;
selectable via I²C
Clock out: tristate / 6.75 / 13.5 / 27 MHz;
selectable via I²C
Horizontal sync pulse output
Input signal for test mode selection
(0 V: no test mode selected)
Leave unconnected or connect to V_SS
Input signal for test mode selection
(0 V: no test mode selected)
Leave unconnected or connect to V_SS
Analog ground of analog PLL and DACs
Analog positive supply voltage of analog PLL
and DACs (5 V)
Analog ground of ADC SYNC
Reference voltage low of ADC SYNC (2.2 V)
SYNC input
Input range selectable via I²C Bus
(subaddress 11_H, SYNAMP)
Semiconductor Group
10
1999-02-10