SDA9206 Datasheet, PDF (25/54 Pages) Siemens Semiconductor Group – ADC with Built in Antialiasing filter and Clock generation UnitS

SDA 9206
2.3.3 Pulse Generation
The clock sync generator supplies the following pulses:
• HS
• VS
• BLN
• Two clamping pulses H1 and H2. H2 is also the internal clamping pulse of
the YUV-ADCs.
• The HS pulse is 16 13.5 MHz clock periods long and can be shifted by the I²C-Bus in
increments of four 13.5 MHz clock periods.
• For the VS pulse refer to vertical noise suppression.
• With the BLN pulse the start time (high-to-low edge) and the stop time (low-to-high
edge) can be set within a certain range of lines in increments of 13.5 MHz clock
periods by I²C Bus. The timing of BLN does not change during
the field blanking interval.
• During the BLN pulse the Y-U-V output data are set to their clamping level.
• For pulse H1 the start time (low-to-high edge) and stop time can be set in increments
of two 13.5 MHz clock periods.
• For pulse H2 the start time (low-to-high edge) and stop time can be set in increments
of 13.5 MHz clock periods.
The timing of the BLN, H1, H2, VS and HS pulses can be set by the costumer using the
specified I²C-Bus bits. Figure 9 shows the ranges of those settings.
SYNC
Reference Time
approx. 2.6 µs
BURST
HS ^{HSON (-35.22 µs ... 28.42 µs)}
H1ON (-28.27 µs ... 9.47 µs)
H1
approx. 1.2 µs
H1OF (-28.27 µs ... 9.47 µs)
H2ON (-4.67 µs ... 14.21 µs)
H2
H2OF (-4.67 µs ... 14.21 µs)
BON (-8.89 µs ... 9.99 µs)
BOF (0.59 µs ... 19.46 µs)
BLN
All times are given in relation to the Reference Time!
All times are only valid for 2FH = 0. If 2FH = 1 all times have to be divided by two!
UET10465
Figure 16
I²C-Bus Programming Areas of Horizontal-Frequency Pulses
Semiconductor Group
25
1999-02-10