SDA9206 Datasheet, PDF (24/54 Pages) Siemens Semiconductor Group – ADC with Built in Antialiasing filter and Clock generation UnitS

SDA 9206
Non-Suppressed
Vertical Sync
from HPLL
Line Number
xxx
Window
(VWIWI = 11)
Interference Pulse
249 289 298 299 300
(199) (200)
(249) (250)
(239) (240)
Window
(VWIWI = 10)
Window
(VWIWI = 01)
Window
(VWIWI = 00)
VS
(noise-suppressed)
Suppression of Interference
Pulse not in Window
Numbers in Brackets for 525 Lines per Frame
311 312
(261) (262)
Vertical Sync
Closes
Window
UED10463
When missing Vertical Sync from HPLL:
Line Number 312 313
339 1
272
(262)
(279) (1)
(242)
VS
SCHW = 0
Windows
Numbers in Brackets for 525 Lines per Frame
RC-Opening
(Independent from WWW Bit)
UED10464
Figure 15
Window for Vertical Pulse Noise Suppression
Semiconductor Group
24
1999-02-10