GV7704 Datasheet, PDF (43/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

Table 5-1: GV7704 Register Descriptions — Channel Controls (Continued)
Address
Register Name
Parameter Name
Bit
Slice
48D6_h (Ch 0)
54D6_h (Ch 1) _{ANC_PACKET_UDW4_ ANC_PACKET_UDW4_}
60D6_h (Ch 2)
7_0_REG
7_0
7:0
6CD6_h (Ch 3)
48D7_h (Ch 0)
54D7_h (Ch 1) _{ANC_PACKET_UDW5_ ANC_PACKET_UDW5_}
60D7_h (Ch 2)
9_8_REG
9_8
1:0
6CD7_h (Ch 3)
48D8_h (Ch 0)
54D8_h (Ch 1) _{ANC_PACKET_UDW5_ ANC_PACKET_UDW5_}
60D8_h (Ch 2)
7_0_REG
7_0
7:0
6CD8_h (Ch 3)
48D9_h (Ch 0)
54D9_h (Ch 1) _{ANC_PACKET_UDW6_ ANC_PACKET_UDW6_}
60D9_h (Ch 2)
9_8_REG
9_8
1:0
6CD9_h (Ch 3)
48DA_h (Ch 0)
54DA_h (Ch 1) _{ANC_PACKET_UDW6_ ANC_PACKET_UDW6_}
60DA_h (Ch 2)
7_0_REG
7_0
7:0
6CDA_h (Ch 3)
48DB_h (Ch 0)
54DB_h (Ch 1) _{ANC_PACKET_UDW7_ ANC_PACKET_UDW7_}
60DB_h (Ch 2)
9_8_REG
9_8
1:0
6CDB_h (Ch 3)
48DC_h (Ch 0)
54DC_h (Ch 1) _{ANC_PACKET_UDW7_ ANC_PACKET_UDW7_}
60DC_h (Ch 2)
7_0_REG
7_0
7:0
6CDC_h (Ch 3)
48DD_h (Ch 0)
54DD_h (Ch 1) _{ANC_PACKET_UDW8_ ANC_PACKET_UDW8_}
60DD_h (Ch 2)
9_8_REG
9_8
1:0
6CDD_h (Ch 3)
R/W
Reset
Value
Description
RO
0_h
User Data Word 4 extracted from
the ancillary data packet. Bits [7:0]
RO
0_h
User Data Word 5 extracted from
the ancillary data packet. Bits [9:8]
RO
0_h
User Data Word 5 extracted from
the ancillary data packet. Bits [7:0]
RO
0_h
User Data Word 6 extracted from
the ancillary data packet. Bits [9:8]
RO
0_h
User Data Word 6 extracted from
the ancillary data packet. Bits [7:0]
RO
0_h
User Data Word 7 extracted from
the ancillary data packet. Bits [9:8]
RO
0_h
User Data Word 7 extracted from
the ancillary data packet. Bits [7:0]
RO
0_h
User Data Word 8 extracted from
the ancillary data packet. Bits [9:8]
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
43 of 52
Semtech