GV7704 Datasheet, PDF (29/52 Pages) Semtech Corporation – Quad HD-VLC Receiver

CHn_ACLK
CHn_AOUT_0_1,
CHn_AOUT_2_3
CHn_WCLK
Not to scale
48kHz audio: 325.5ns
44.1kHz audio: 354.3ns
32kHz audio: 488.3ns
DATA
DATA
t_oh
t_od
Figure 4-11: ACLK to Audio Data and WCLK Signal Output Timing
Table 4-10: GV7704 Serial Audio Data Outputs - AC Electrical Characteristics
Parameter
Output Data Hold Time
Output Data Delay Time
Symbol
t_OH
t_OD
Conditions
50% levels; 1.8V operation
Min Typ Max
1.5 — —
— — 7.0
Units
ns
ns
4.8.1 Serial I²S Audio Data Format
The GV7704 supports the I²S serial audio data format, as shown in Figure 4-12 below.
CHn_WCLK
Channel A (Left)
CHn_ACLK
CHn_AIN_0_1/CHn_AIN_2_3
23 22
MSB
6543210
LSB
Figure 4-12: I²S Audio Output Format
Channel B (Right)
23 22
MSB
6543210
LSB
4.8.2 Audio Mute
The GV7704 can mute either pair of output audio channels using 2 host interface control
bits for each video lane. The bits can mute channels 0 & 1 or channels 2 & 3. Channels 0
& 1 can be muted by asserting the MUTE 0_1 bit in the AUD_EXT_CONFIG_REG for any
of the four video lanes. Channels 2 & 3 can be muted by asserting the MUTE_2_3 bit in
the AUD_EXT_CONFIG_REG for any of the four video lanes. See Table 4-11.
By default, the 4 channels will not be muted.
GV7704
Preliminary Data Sheet Rev.3
PDS-060376
September 2015
www.semtech.com
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Semtech